Features

• Features to bridge the hardware and software worlds
• Broad microprocessor support with source code linking
• 5 modes of timing analysis to capture different kinds of data
• 34 state and timing channels
• 50 MHz state analysis with 2 state clocks/qualifiers
• Resolution down to 2 ns
• Captures data bursts separated by long time periods
• Suited for programmable logic and 8-bit microprocessor systems
• RS232 and GPIB interfaces
• Speed documentation with screen image and data files in standard formats

Specifications

• State and timing channels: 34
• State analysis speed: 50 MHz in all modes
• State/Timing Memory Depth: 4K samples on all channels, 8K samples on half channels (state analysis depth is halved when time tags are turned on)
• Setup/Hold Time: 3.5/0 ns to 0/3.5 ns adjustable in 500-ps increments
• Timing analysis:
  Conventional: 250 MHz all channels, 500 MHz half channels
  Transitional: 125 MHz all channels, 250 MHz half channels
  Glitch: 125 MHz half channels
• Minimum Detectable Glitch Width: 3.5 ns
• Probe Input R & C: 100KΩ and ~ 8 pF
• Trigger Resources
  Patterns: 10
  Edge and Glitch Terms: 2
  Ranges: 2
  Timers: 2
• Trigger Sequence Levels: 12 with state analysis and 10 with timing analysis
• Trigger Macros: 23 pre-defined trigger sequences with graphical representations and plain language descriptions
• Mass Storage: 1.44 MB floppy drive
• OS Boot Method: 1.44 MB floppy drive