Phoenix/CTC 5500A Telecommunications Analyzer

Phoenix/CTC 5500A Telecommunications Analyzer
Enlarge Image
Request Quote Print Page
Datasheet

Features:

  • Fractional ( Nx64 ) testing capabilities
  • Plug-in interfaces permit testing to international standards
  • Digital frequency synthesizer with 1ppm accuracy and 1 Hz resolution
  • RS-232 and IEEE-488 interfaces for remote control
  • Tests T1 framed, SLC® 96, unframed, and ESF formats
  • User programmable test setup permits two button automatic setup and testing
  • Allows BERT stress testing with patterns trapped from "Live" traffic to locate pattern sensitive problems
  • Jitter injection and measurement at 1.544 and 2.048 Mbps
  • Simultaneous bit, frame, logic, and bipolar violation measurements
  • 64 K bit trap for bit-by-bit analysis of data stream
  • DDS testing at the DS0 ( 64 Kbps ) level

Specifications:

Internal Bit Rates
  • Synthesizer Controlled - Accuracy 1ppm from 50 Hz to 13 MHz
  • Tuning Increments
    50Hz - 500kHz @ .1Hz increments
    500kHz - 6.5MHz @ 1Hz increments
    6.5MHz - 13MHz @ 2Hz increments

 

Clock Sources
  • Internal Clock ( see bit rates above )
  • User Clock ( User supplied TTL clock - 50 bps to 13Mbps )
  • External Clock ( Clock supplied by interface module - TC, RC, XC, etc. )
  • Recovered Clock ( Clock recovered from received bit stream )

 

Patterns
Mark Space Alt REV 2047 2^20-1 NET55
63 511 SYSY 511 X25 511 2047 2^15-1 QRW
FOX FOX2 2^9-1A USER - 24 - to 16,384-bit repeating pattern

 

Pattern Sync Criteria - to acquire pattern synchronization:

  • For MARK, SPACE, ALT, FOX, T1SET, T1RESET: = 24 + 32 = 56 bits, SYS511, X25 511 = entire pattern = 4088 bits
  • Pseudorandom = 24 + 32 = 56 bits
  • Loss of pattern synchronization: Adjustable - user may set from 1 bit error to 20000 bit errors in a 100000 bit test block

 

Injectable Error Rates: Single error inject available on all of the below

Bit Errors 9E-3 to 1E-9 CRC 9E-3 to 1E-7
BPVs 9E-3 to 1E-7 F-Bit 9E-3 to 1E-7
S-Bit 9E-3 to 1E-7 Bit errors in live traffic - 9E-3 to 1E-7

 

Selected Test Results
Adjusted Bit Errors Occurrences of Frame Losses CRC Errored Seconds
Bit Errors Power Failures Elapsed Test Time
Block Errors Current Bit Errors Elapsed Test Time in Seconds
Bits Analyzed Transmitter Bipolar Violations Percent of Error Free Seconds
CRC Errors Transmitter Sync Losses Errored Second Rate
Clock Slips Negative Peak Wander Frame Bit Error Free Seconds
Error Free Blocks Percent Ones Density (ones/bits) Alarm Status
Frame Bit Errors Adjusted Bit Error Rate Pattern Sync Loss
Blue Alarm Seconds Bit Error Rate Received Bipolar Violations
CRC Error Free Seconds Blocks Receiver Sync Losses
Elapsed Test Days Receive BPV Rate Transmitter BPV Rate
Errored Seconds Current Bit Error Seconds Positive Peak Wander
Error Free Seconds CRC Error Rate Occurrences of greater than 15 consecutive zeros
Frame Bit Errored Seconds Errored Block Rate
Frame Loss Seconds Frame Bit Error Rate  

 

Frequency Measurement
  • Selections: TC - Transmit Clock; XC - External Clock, RC: Receive Clock, BR: Bit Rate
  • Range: 150 Hz to 16 MHz

 


Network Loop Delay

Measurement Range: 1 usec to 5 minutes

 

Bias Measurement


Source: Receive Data
Range: 0 to 100%

 

Graphs - Graphed Parameters:
Bit Errors Transmit BPVs ( T1 ) Error Free Seconds
Errored Blocks Transmit BPV Seconds ( T1 ) Receive BPVs ( T1 )
Error Free Blocks Transmit BPV Free Seconds ( T1 ) Receive BPV Seconds ( T1 )
Sync Loss Errored Seconds Receive BPV Free Seconds ( T1 )

 

Jitter


Low Speed Jitter

  • Frequency Range: 75 bps to 72 Kbps
  • Measurements ( in percent of one bit time ):
    Positive Peak Jitter Average Jitter
    Negative Peak Jitter Peak-to-Peak Jitter

 

High Speed Jitter (Optional)

Available Frequencies: 1.544 Mbps ( T1-J02 option ) and 2.048 Mbps ( G.703-J05 option )

 

Remote Control

Connection: RS-232 Printer / Remote Control Interface and IEEE-488 Bus Interface

 

Display

High Resolution, 5" monochrome, cathode ray tube

 

Interface Options
  • 5500A-200: RS-232 DCE / DTE / MIL STD 188C
  • 5500A-254: Multiple Switching Unit to Permit up to four I/O modules
  • 5500A-300: CCITT V.35 DCE / DTE
  • 5500A-450: RS-449 / MILSTD 188-144 / MILSTD 188-100 ( RS-422 / 423 DTE / DCE )
  • 5500A-500: TTL
  • 5500A-538: DDS Interface ( local loop testing-subrates and 56 Kbps )
  • 5500A-539: DS0 / DS1 Interface
  • 5500A-555: I / O Control Module used to interface the Model 5500A to MSU
  • 5500A-600: T1-C ( Unframed )
  • 5500A-605: Bi-Phase
  • 5500A-628: T1 ( Framed / Unframed / ESF )
  • 5500A-636: T1 ( Nx64 / 56) Fractional
  • 5500A-700: T2 ( unframed )
  • 5500A-805: CCITT G.703 ( 8.448 Mbps )
  • 5500A-810: CCITT G.703 ( 64 Kbps )
  • 5500A-815: CCITT G.703 ( 2.048 Mbps )
  • 5500A-828: CCITT G.703 ( 2.048 Mbps )
  • 5500A-836: G.703 ( Nx64 ) Fractional
  • 5500A-900: Bell 303 Interface